The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC manufacturing are needed.
For example, electron beam (e-beam) technology is often used in the manufacture of semiconductor devices. In one example, a computer controlled electron pattern generator is used to direct an e-beam towards a semiconductor substrate coated with a layer of electron-sensitive resist (the target). The exposed portions of the resist are then developed and removed, thereby leaving a patterned resist layer on the semiconductor substrate as a mask for further lithographic processes. A common type of electron pattern generator uses an array of mirrors to deflect the e-beam in forming a gray-scale raster image on the target. The resolution of the image depends on the number of mirrors in the electron pattern generator. Generally, the more mirrors, the higher resolution of the image. As semiconductor process advances to nanometer (nm) range, there is a need to design such an electron pattern generator more efficiently.